high-quality image and video processing for the next generation of advanced driver assistance systems (adas) OV490 companion isp product brief lead free available in a lead-free package the OV490 is a new powerful companion chip that brings improved high dynamic range (hdr) functionality as well as high-quality image and video processing to next-generation advanced driver assistance systems (adas). working in conjunction with other high- performance image sensors, the OV490 enables extremely flexible system partitioning to support a number of advanced automotive features. omnivision's OV490 enables simultaneous output of fully processed yuv or rgb for display-based applications and raw data for machine-vision downstream processing. it also incorporates unique architecture that is capable of processing two video pipelines, resulting in reduced bill-of-materials. the OV490 contains a well-defined feature set to fulfill automotive safety integrity level (asil) according to iso26262. the companion chip fits into a bga package, and is expected to complete aec-q100 grade-2 qualifications. find out more at www.ovt.com.
? ? rear view camera surround view system ? camera monitoring system applications ? ? ? ? ? ? ? ? ? ? feature set optimized for next generation surround view applications simultaneous output of fully processed yuv for display based applications and raw only to enable machine vision downstream processing parallel processing of two input streams industry leading hdr technology, third generation hdr technology allows capturing of more details in bright and dark environments jtag boundary scan high speed serial data transfer with mipi csi-2 embedded information including: frame counter, temperature and register data in each image to enable critical automotive safety applications industry?s first features to improve image harmonization and synchronization for surround view applications sccb master interface for automatic sensor configuration at power-on sccb slave interface for OV490 configuration by host on chip pll to generate stable internal clock frequency on chip voltage regulator 3.3v/1.8v to 1.2v brown-out detection circuit and output flag embedded 32-bit risc processor for high performance and great flexibility supports 1k bits of one time programmable memory (otp) advanced isp for high quality image capturing and video streaming advanced auto white balance (awb) aec/agc with statistical data from hardware engine and algorithm running on risc support of four user-defined roi windows for statistics dns (raw de-noise) and cip (de-mosaic) supports power cut mode designed for power saving during system quiescence aec-q100 grade 2 qualification ? ? ? ? ? ? ? ? ? ? ? ? product features ? ov00490-b00g-tb (lead-free, 100-pin bga, packed in tape and reel) ? ov00490-b00g-1b (lead-free, 100-pin bga, packed in tray) ordering information ? ? power supply: - core: 1.2v 10% - i/o: 1.8v 10% or 3.3v 10% power requirements: 250 ma ? ? temperature range: - operating: -40c to +105c ambient temperature and -40c to +125c junction temperature package dimensions: 7 mm x 7 mm product specifications OV490 v e r s i o n 1 . 3 , a p r i l , 2 0 1 7 o m n i v i s i o n r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o t h e i r p r o d u c t s o r t o d i s c o n t i n u e a n y p r o d u c t o r s e r v i c e w i t h o u t f u r t h e r n o t i c e . o m n i v i s i o n , t h e o m n i v i s i o n l o g o a n d o m n i p i x e l a r e r e g i s t e r e d t r a d e m a r k s o f o m n i v i s i o n t e c h n o l o g i e s , i n c . o m n i b s i - 2 i s a t r a d e m a r k o f o m n i v i s i o n t e c h n o l o g i e s , i n c . a l l o t h e r t r a d e m a r k s a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s . 4275 burton drive santa clara, ca 95054 usa tel: + 1 408 567 3000 fax: + 1 408 567 3001 www.ovt.com o v490 input interf ace isp process output interf ace mipi rx idc d vp in aec/a gc a wb tone map sccbm1 sccbm0 u ar t u ar t1 bro wn out spi spi flash pll 32 bits risc cpu temper ature sensor regulator 128k pram 32k boot rom sccbs reset p wd dma firmware s y s bus sensor 0/1 yuv/ra w[0:11] x clk sensor 0 fr ame sync hdr isp embedded line mipi tx d vp out color bar 2 color bar 0/1 vfifo po w er do wn reset sck/sd a functional block diagram
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